Title Lowering the cost of quantum comparator circuits /
Authors Donaire, Laura M ; Ortega, Gloria ; Garzón, Ester M ; Orts Gomez, Francisco Jose
DOI 10.1007/s11227-024-05959-4
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Is Part of Journal of supercomputing.. Dordrecht : Springer. 2024, vol. 80, iss. 10, p. 13900-13917.. ISSN 0920-8542. eISSN 1573-0484
Keywords [eng] fault tolerance ; quantum circuits ; quantum comparators ; quantum computing ; T-count
Abstract [eng] Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes. However, it is important to note that T-gates come at a considerable computational cost. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We articulate the proposed circuits employing Clifford+T gates, facilitating error correction code implementation. Additionally, we minimise T-gate usage, thereby reducing computational costs and fortifying circuit robustness against errors and environmental disturbances-essential for mitigating the effects of internal and external noise. Our methodology employs a bottom-up examination of comparator circuits, initiating with a detailed study of their gates. Subsequently, we systematically dissect the functions of these gates, thereby advancing towards a comprehensive understanding of the circuit’s overall functionality. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance.
Published Dordrecht : Springer
Type Journal article
Language English
Publication date 2024
CC license CC license description