| Abstract [eng] |
This thesis deeply explored Intel Itanium architecture features that improve a code generated by compiler. Compiler optimizations which are tuned to this architecture are also described. Accomplished research showed that there were several types of optimizations which can be improved on IA-64 architecture. Firstly, optimizations which are dependent on architecture can be optimized using predication and speculation or other unique IA-64 features. Secondly, optimizations that are undependable from traditional architecture can be improved using more aggressive compilation controllable parameters than they are by default. Loop optimizations were chosen for final research. Research proved that changing values of these parameters from default can improve program performance. |
