| Keywords [eng] |
D-band frontend, millimetre-wave, frequency tripler, CMOS , power amplifier, I-V characteristics, IC chip design, 6G |
| Abstract [eng] |
Higher frequency bands are the main matter of research due to the need for faster wireless communication systems. The D-band, which spans 110 to 170 GHz, has a large bandwidth that can accommodate the extremely high data rates required for upcoming 6G wireless networks. However, because components operate differently than at lower frequencies and typical simulation models do not necessarily match the behavior of produced chips, it is challenging to develop integrated circuits that function appropriately at these frequencies. In the literature review, the components of this model are explained and the observed works are compared. In this thesis, the circuit for D-band frequency is prepared, the blocks in the system, i.e. Balun, Filter, tripler, passive elements, amplifier and antenna are characterized. The layout of the elements was prepared and compared with their ideal versions. In this work, the difference between real and ideal models of the system has been studied and explained. A prototype chip has been fabricated and initial electrical measurements have been carried out. The measurements confirmed that all transistors are healthy, with gate leakage below 1 nA and consistent threshold voltages between 0.41 and 0.46 V. The literature review findings about optimal bias conditions for triplers and amplifiers are supported and have been discussed in the results of real chip transistors. To conclude, the outcomes of this thesis include a collection of designed D-band frontend components with validated simulation methodology and a characterized understanding of the difference between simulation models and real devices. |
